cystech electronics corp. spec. no. : c368c6 issued date : 2014.05.09 revised date : page no. : 1/6 HBC143EC6 cystek product specification dual npn digital transistors HBC143EC6 features ?built-in bias resistors enable the configuration of an inverter circuit without connecting external input resistors (see equivalent circuit). ? the bias resistors consist of thin-film resistors with complete isolation to allow negative biasing of the input. they also have the advantage of almost completely eliminating parasitic effects. ? only the on/off conditions need to be set for operation, making device design easy. ? two dtc143e chips in a sot-563 package. ? mounting by sot-523 automatic mounting machines is possible. ?mounting cost and area can be cut in half. ? complements the hba143ec6 ?pb-free lead plating and halogen-free package. equivalent circuit outline sot-563 HBC143EC6 ordering information device package shipping HBC143EC6-0-t1-g sot-563 (pb-free lead plating and halogen-free package) 3000 pcs / tape & reel c1 b2 e2 tr1 tr2 r b 1 r be 2 r be 1 r b 2 r b 1=4.7k , r b 2=4.7 k c2 b1 e1 r be 1=4.7k , r be 2=4.7 k environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t1 : 3000 pcs / tape & reel, 7? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c368c6 issued date : 2014.05.09 revised date : page no. : 2/6 HBC143EC6 cystek product specification absolute maximum ratings (each transistor, ta=25 ) parameter symbol limits unit supply voltage v cc 50 v input voltage v in -10~+30 v i o 100 ma output current i o(max.) 100 ma power dissipation pd 150 (note) mw junction temperature tj 150 c storage temperature tstg -55~+150 c note: 120mw per element must not be exceeded. electrical characteristics (each transistor, ta=25 ) parameter symbol min. typ. max. unit test conditions v i(off) - - 0.5 v v cc =5v, i o =100 a input voltage v i(on) 3 - - v v o =0.3v, i o =20ma output voltage v o(on) - 0.1 0.3 v i o /i i =10ma/0.5ma input current i i - - 1.8 ma v i =5v output current i o(off) - - 0.5 a v cc =50v, v i =0v dc current gain g i 20 - - - v o =5v, i o =10ma input resistance r 1 3.29 4.7 6.11 k - resistance ratio r 2 /r 1 0.8 1 1.2 - - transition frequency f t - 250 - mhz v ce =10v, i c =5ma, f=100mhz * * transition frequency of the device
cystech electronics corp. spec. no. : c368c6 issued date : 2014.05.09 revised date : page no. : 3/6 HBC143EC6 cystek product specification typical characteristics current gain vs output current 0.1 1 10 100 1000 0.1 1 10 100 output current---i o (ma) current gain---g i vo = 5v output voltage vs output current 0.01 0.1 1 11 0 output current---io(ma) output voltage---v o(on) (v) 1 0 0 io / ii = 20 input voltage vs output current(on characteristics) 0.1 1 10 0.1 1 10 100 output current---io(ma) input voltage---v i(on) (v) vo = 0.3v output current vs input voltage(off characteristics) 0.01 0.1 1 10 00.511.522.53 input voltage ---v i(off) (v) output current---io(ma) vcc = 5v power derating curves 0 20 40 60 80 100 120 140 160 0 50 100 150 200 ambient temperature --- ta( ) power dissipation---pd(mw) dual single
cystech electronics corp. spec. no. : c368c6 issued date : 2014.05.09 revised date : page no. : 4/6 HBC143EC6 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c368c6 issued date : 2014.05.09 revised date : page no. : 5/6 HBC143EC6 cystek product specification recommended wave soldering condition peak temperature soldering time product pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cyst spec. no. : c368c6 ech electronics corp. issued date : 2014.05.09 revised date : page no. : 6/6 HBC143EC6 cystek product specification sot-563 dimension marking: 8j product code date code: year+month year: 6 2006, 7 2007 month: 1 1, 2 2, ??? 9 9, a 10, , c 12 b 11 6-lead sot-563 plastic surface mounted package cystek package code: c6 style: pin 1. emitter1 (e1) pin 2. base1 (b1) pin 3. collector2 (c2) pin 4. emitter2 (e2) pin 5. base2 (b2) pin 6. collector1 ( c1 ) inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.021 0.024 0.525 0.600 b 0.007 0.011 0.170 0.270 a1 0.000 0.002 0.000 0.050 e1 0.043 0.051 1.100 1.300 e 0.018 0.022 0.450 0.550 e 0.059 0.067 1.500 1.700 c 0.004 0.006 0.090 0.160 l 0.004 0.012 0.100 0.300 7 ref 7 ref d 0.059 0.067 1.500 1.700 notes : 1 .controlling dimension : millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material : ? lead : pure tin plated. ? mold compound : epoxy resin family, flammability solid burning class:ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
|
